For a multiplicity of applications of electronic semiconductor components and integrated circuits (IC), it is advantageous to restrict the total thickness of the semiconductor components and of the integrated circuits. Thus, for example, in disposable electronics and for chip cards and smart cards, a very small mass and a very small structural height are of importance. By using targeted settings of the thickness of the semiconductor body used, the electrical properties of e.g., vertical power semiconductor components can be improved by adapting the thickness of the semiconductor body to the voltage class of the respective power semiconductor component, in order to avoid unnecessary electrical resistance through over-dimensioned semiconductor bodies. However, this necessitates a very precise and reproducible thickness setting over the entire area of the semiconductor body used, in order to avoid losses of yield in production and in order to ensure reliable electrical properties of the semiconductor component and of the integrated circuit.
In the conventional related-art, p-type silicon is generally used as starting material of semiconductor wafers. For example, in US Pub. 2010/0210091, a method for self-aligned thinning of a semiconductor wafer is disclosed, wherein a p-doped substrate is used as the starting material. One problem with the conventional related-art is the restriction of the p-type substrate, because: on the one hand, in order to produce a well-defined extension of the space charge zone (also referred to herein as “space charge region”) in the p-doped silicon substrate, a sufficient p-doping of the starting material must be ensured, with which a counter-doping, by the formation of thermal donors, of the p-type material should be avoided; on the other hand, in order to avoid strongly compensating of the basic doping caused by proton irradiation, which in turn requires much higher doses of surface proton irradiation, the p-doping of the starting substrate must not be too high.
Thus, there is a need in the art to provide an easy-controlled method for self-aligned and well-defined thinning of semiconductor wafers, with which a good reproducibility of the wafer thickness and a very good uniformity of wafer surface are possible to provide.